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NCL30001
A LF + @ gm @ R AC_COMP @ (2.286)
A HF +
+ 5.333
4k
R CS + 4.5
@ gm @ R AC_COMP @ (2.286) t
R AC_COMP t
4666
f z +
1
C AC_COMP +
1
OSC
(1.2) @ V CT(peak) @ (21.33k)
V RCOMP +
+
N P
V out
V out
di
+
+
@
dependent of the average input current and the instantaneous
switch current. The gain of the average input current or slow
loop is given by Equation 9.
R IAVG
(eq. 9)
4k
The low frequency gain is the product of the current sense
averaging circuit, the transconductance amplifier and the
gain of the AC error amplifier.
A current proportional to the instantaneous current is
generated using a 4 k W resistor in the current sense amplifier
input. This proportional current is applied to a 21.33 k W at
the PWM comparator input to generate a current sense
voltage signal. The high frequency or fast loop gain, A HF , is
calculated using Equation 10.
21.33k
(eq. 10)
Equation 11 shows system stability requirements. That is,
the low frequency gain has to be less than one half of the high
frequency gain.
R IAVG 5.333
(eq. 11)
4k 2
Equation 12 is obtained by re-arranging Equation 11 for
R AC_COMP . This equation provides the maximum value for
R AC_COMP .
(eq. 12)
R IAVG @ gm
The control loop zero, f Z , is calculated using Equation 13.
The control loop zero should be set at approximately at
1/10 th of the oscillator frequency, f OSC . The compensation
capacitor is calculated using Equation 14.
(eq. 13)
2 p @ C AC_COMP @ R AC_COMP
(eq. 14)
f
2 p @ 10 @ R AC_COMP
Current Sense Resistor
The PFC stage has two control loops. The first loop
controls the average input current and the second loop
controls the instantaneous current across the main switch.
The current sense signal affects both loops. The current
sense signal is fed into the positive input of the error
amplifier to control the average input current. In addition,
the current sense information together with the ramp
compensation and error amplifier signal control the
instantaneous primary peak current.
The primary peak current, I PK , is calculated using
Equation 15,
where, V in(LL) is the low line ac input voltage, D is the duty
ratio, P out is the output power, P in is the input power, h is the
efficiency, L P is the primary inductance and t on is the on
time. Typical efficiency for this topology is around 88%.
The current sense resistor is selected to achieve maximum
signal resolution at the input of the ac reference amplifier.
The maximum voltage input of the ac reference amplifier to
prevent saturation is 4.5 V. This together with the
instantaneous peak current is used to calculate the current
sense resistor, R CS , using Equation 16.
4k @ V in(LL) @ D
(eq. 16)
R IAVG @ P in @ 2
Ramp Compensation
Subharmonic oscillations are observed in peak
current-mode controllers operating in continuous
conduction mode with a duty ratio greater than 50%.
Injecting a compensation ramp on the current sense signal
eliminates the subharmonic oscillations. The amount of
compensation is system dependent and it is determined by
the inductor falling di/dt.
The NCL30001 has built in ramp compensation to
facilitate system design. The amount of ramp compensation
is set by the user with a resistor, R RCOMP , between the Ramp
Comp pin and ground. The Ramp Comp pin buffers the
oscillator ramp generated on the C T pin. The current across
R RCOMP is internally mirrored with a 1:1.2 ratio. The
inverted ac error amplifier and the instantaneous switch
current signals are added to the ramp compensation mirrored
current. The resulting current signal is applied to an internal
21.33 k W between the PWM Comparator non inverting
input and ground as shown in Figure 55.
The maximum voltage contribution of the ramp
compensation signal to the error signal, V RCOMP , is given by
Equation 17.
(eq. 17)
102.38k
R RCOMP R RCOMP
where, V CT(peak) is the oscillator ramp peak voltage,
typically 4.0 V.
For proper ramp compensation, the ramp signal should
match the falling di/dt (which has been converted to a dv/dt)
of the inductor at 50% duty cycle. Both the falling di/dt and
output voltage need to be reflected by the transformer turns
ratio to the primary side. Equations 18 through 23 assist in
the derivation of equations for R CS and R COMP .
2
(eq. 18)
dt secondary L S L P N S
I PK +
2 @ P out
h @ V in(LL) @ D
)
V in(LL) @ t on
0.88 @ 2 @ L P
(eq. 15)
di
dt primary
+
di
dt secondary
@
N S
N P
+
V out N P
L P N S
(eq. 19)
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